{
  "schema_version": "0.1.0",
  "record_type": "research-topic",
  "topic_id": "performance-optimization",
  "label": "Performance Optimization",
  "title": "Performance Optimization Research",
  "description": "Performance Optimization research papers in the Naser Ezzati-Jivan publication catalog.",
  "introduction": "This topic page groups Naser Ezzati-Jivan research papers related to performance optimization. Each linked record provides the paper's problem, method, findings, limitations, keywords, and authoritative source links.",
  "aliases": [
    "performance optimization"
  ],
  "search_terms": [
    "Performance Optimization"
  ],
  "related_topics": [],
  "canonical_url": "https://threadslab.org/research-publications/topics/performance-optimization.html",
  "paper_count": 5,
  "papers": [
    {
      "paper_id": "deba-adaptive-batch-scheduling",
      "title": "One Size Does Not Fit All: Architecture-Aware Adaptive Batch Scheduling with DEBA",
      "year": 2025,
      "authors": [
        "François Belias",
        "Naser Ezzati-Jivan",
        "Foutse Khomh"
      ],
      "page_url": "https://threadslab.org/research-publications/papers/deba-adaptive-batch-scheduling/",
      "canonical_source_url": "https://arxiv.org/abs/2511.03809",
      "core_contribution": "DEBA is an architecture-aware adaptive batch scheduler that uses training-stability signals to decide when and how to change batch size.",
      "tags": [
        "deep-learning-systems",
        "adaptive-scheduling",
        "performance-optimization",
        "architecture-aware-methods"
      ],
      "keywords": [
        "DEBA",
        "adaptive batch size",
        "gradient variance",
        "training speedup",
        "ResNet",
        "DenseNet",
        "EfficientNet",
        "ViT"
      ]
    },
    {
      "paper_id": "distributed-architecture-for-an-integrated-development-environment-large-trace-analysis-and-visu",
      "title": "Distributed Architecture for an Integrated Development Environment, Large Trace Analysis, and Visualization",
      "year": 2021,
      "authors": [
        "Yonni Chen Kuang Piao",
        "Naser Ezzati-Jivan",
        "Michel R. Dagenais"
      ],
      "page_url": "https://threadslab.org/research-publications/papers/distributed-architecture-for-an-integrated-development-environment-large-trace-analysis-and-visu/",
      "canonical_source_url": "https://doi.org/10.3390/s21165560",
      "core_contribution": "The paper presents a modular client-server architecture for large-trace storage, analysis, and visualization inside an integrated development environment.",
      "tags": [
        "system-tracing",
        "trace-analysis",
        "observability",
        "performance-optimization",
        "multicore-systems"
      ],
      "keywords": [
        "distributed architecture",
        "Trace Compass",
        "TraceScape",
        "LTTng 2.10.3",
        "Trace Analysis Server Protocol",
        "TASP",
        "Protobuf",
        "GZip JSON",
        "large traces",
        "state models",
        "trace visualization",
        "PixiJS",
        "Chart.js",
        "HighCharts"
      ]
    },
    {
      "paper_id": "efficient-trace-analysis-parallelization",
      "title": "Efficient Methods for Trace Analysis Parallelization",
      "year": 2019,
      "authors": [
        "Fabien Reumont-Locke",
        "Naser Ezzati-Jivan",
        "Michel R. Dagenais"
      ],
      "page_url": "https://threadslab.org/research-publications/papers/efficient-trace-analysis-parallelization/",
      "canonical_source_url": "https://doi.org/10.1007/s10766-019-00631-4",
      "core_contribution": "The paper partitions Common Trace Format streams into balanced workloads, resolves cross-chunk state dependencies, and parallelizes stateful trace analyses with low synchronization cost.",
      "tags": [
        "trace-analysis",
        "performance-engineering",
        "multicore-systems",
        "performance-optimization"
      ],
      "keywords": [
        "trace analysis",
        "parallelization",
        "analysis scalability",
        "multicore processing",
        "CTF",
        "Babeltrace",
        "LTTng",
        "parallel efficiency",
        "State History Tree"
      ]
    },
    {
      "paper_id": "enhanced-state-history-tree-esht-a-stateful-data-structure-for-analysis-of-highly-parallel-syste",
      "title": "Enhanced State History Tree (eSHT): A Stateful Data Structure for Analysis of Highly Parallel System Traces",
      "year": 2016,
      "authors": [
        "Loic Prieur-Drevon",
        "Raphael Beamonte",
        "Naser Ezzati-Jivan",
        "Michel R. Dagenais"
      ],
      "page_url": "https://threadslab.org/research-publications/papers/enhanced-state-history-tree-esht-a-stateful-data-structure-for-analysis-of-highly-parallel-syste/",
      "canonical_source_url": "https://doi.org/10.1109/BigDataCongress.2016.19",
      "core_contribution": "eSHT redesigns the State History Tree to store and query highly parallel trace intervals more compactly and with shallower trees.",
      "tags": [
        "kernel-tracing",
        "trace-analysis",
        "performance-optimization",
        "multicore-systems",
        "resource-analysis"
      ],
      "keywords": [
        "Enhanced State History Tree",
        "eSHT",
        "State History Tree",
        "interval data",
        "external-memory indexing",
        "LTTng 2.7.0",
        "Trace Compass",
        "Linux kernel 4.3.0",
        "parallel traces",
        "node fill",
        "tree depth",
        "query optimization"
      ]
    },
    {
      "paper_id": "high-performance-internet-connection-filtering-in-kernel",
      "title": "High Performance Internet Connection Filtering through an In-Kernel Architecture",
      "year": 2011,
      "authors": [
        "Naser Ezzati Jivan",
        "Alireza Shameli Sendi",
        "Naser Nematbakhsh",
        "Michel Dagenais"
      ],
      "page_url": "https://threadslab.org/research-publications/papers/high-performance-internet-connection-filtering-in-kernel/",
      "canonical_source_url": "https://publications.polymtl.ca/16917/",
      "core_contribution": "The paper moves part of an application proxy into the kernel to reduce context switches and unnecessary data copies during connection filtering.",
      "tags": [
        "performance-engineering",
        "performance-optimization",
        "resource-analysis"
      ],
      "keywords": [
        "in-kernel proxy",
        "connection filtering",
        "Fire Bench",
        "SPECWeb2009",
        "context switches",
        "data copies",
        "HTTP proxy",
        "FTP",
        "TELNET",
        "kernel architecture"
      ]
    }
  ]
}